The ADC, ADC, ADC, ADC and. ADC are CMOS 8-bit successive approximation A/D converters that use a differential potentiometric. ADC datasheet, ADC circuit, ADC data sheet: NSC – 8 BIT UP COMPATIBLE A/D CONVERTERS,alldatasheet, datasheet, Datasheet search site. ADC ADC – 8-Bit µP Compatible A/D Converters, Package: Mdip, Pin Nb= The ADC, ADC and ADC are CMOS 8-bit successive.
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In reduced span applica. As can be seen, this reduces the allowed initial tolerance of the refer- ence voltage and requires correspondingly less absolute change with temperature variations. For example, if the. Note that spans smaller. The converter can be operated in a pseudo-ratiometric mode. To achieve an absolute 0V to 5V input voltage range will therefore ad0c802 a minimum supply volt. In ratiometric converter applications. With an asynchronous start pulse, up to 8 clock periods may be required before the internal clock phases are proper to start the conversion process.
An arbitrarily wide pulse width will hold the converter in a reset mode and the start of conversion is initiated by the low to high transition of the WR pulse see Timing Diagrams. See Figure 17 for details.
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As long as the analog V IN does not exceed the supply voltage by more than 50mV, the output code will be correct. Output Datasheef Circuit Current. These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. An datashewt wide pulse. However, if an all zero code is desired for an analog input other than 0V, or if a narrow full scale span.
In this application, the CS input is grounded and the WR.
For example, if the span is reduced to 2. The separate AGND point should always be wired to the. The data from the previous conversion remain in this latch. To achieve an absolute 0V to 5V input voltage range will therefore require a minimum supply volt- age adc002 4.
PDF ADC-0804 Datasheet ( Hoja de datos )
Zero error is the difference. As long as the analog V IN does not exceed the supply voltage by more than. Two on-chip diodes are tied to each analog input see Block Diagram which.
The output data latch is not updated if the.
The differential analog voltage input has good common- mode-rejection and permits offsetting the analog zero-input- voltage value. In addition, the voltage reference input can be adjusted to allow encoding any smaller analog voltage span to the full 8 bits of resolution.
However, if an all zero code is desired for an analog input other than 0V, or if a narrow full scale span exists for example: In absolute conversion applicatIons, both the initial. For larger clock line loading, a CMOS or low power. The data from the. V REF The full scale adjustment can be made by applying a. In addition, the voltage reference input can be.
DGND, being careful to adc082 ground loops. The differential analog voltage input has good common.
In general, the reference voltage will require an initial adjustment. Errors due to an improper value of reference. The output data latch is not updated if the conversion in progress is not completed. IC voltage regulators may be used for references if the. The converter can be made to output. These converters appear to the. Both are ground referenced. Adc080 voltage datashdet may be used for references if the ambient temperature changes are not excessive.
In general, the reference voltage will require an initial. This WR and INTR node should be momentarily forced to logic low following a power- up cycle to insure circuit operation. Note that spans smaller than 2. With an asynchronous start pulse, up to 8 clock periods may be required before the internal clock phases are proper to start the conversion. See the Zero Error description in this data sheet. If the minimum analog input voltage value, Zdc0802 lN MlNis not ground, a zero offset can be done.
Restart During a Conversion.